#include "debug.h"
#include "../DDIC/AllDDIC.h"
#include "../DEMURA/Demura.h"
#include "usbd_cdc.h"

/********************************************************************************************
NT37701 639DOE
********************************************************************************************

********************************************************************************************/
u8 NT37701_639DOE_buf[10];

void NT37701_639DOE_QE1(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[4]; 
		u16 tmp;
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 CMD3[6] ={0x05,0xFF,0xAA,0x55,0xA5,0x80};

		u8 Index_09[3]={0x02,0x6F,0x09};
		u8 Index_07[3]={0x02,0x6F,0x07};
		u8 Index_12[3]={0x02,0x6F,0x12};
		u8 Index_13[3]={0x02,0x6F,0x13};
		u8 Index_18[3]={0x02,0x6F,0x18};

		u8 C3h_01[9]={0x08,0xC3,0xC7,0x00,0x00,0x00,0x00,0x00,0x00};
		u8 C3h_02[9]={0x08,0xC3,0x03,0x00,0x00,0x08,0x00,0x0F,0xFA};
		//u8 C3h_03[9]={0x08,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF};

		u8 FBh_57[4]={0x03,0xFB,0x57,0x1F};
		u8 FBh_55[4]={0x03,0xFB,0x55,0x1F};
		u8 FBh_5D[4]={0x03,0xFB,0x5D,0x1F};
		u8 FBh_75[4]={0x03,0xFB,0x75,0x1F};
		u8 FBh_77[4]={0x03,0xFB,0x77,0x1F};
		u8 FBh_00[4]={0x03,0xFB,0x00,0x00};	

		//-----------------------------------------------------------		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15); 		
		//--------------------leave deep standby------------------------
		SSD2828_W_Array(SigMode,channel,PAGE4,0);
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3; 
		buffer1[2] = 0xAB; 
			SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
		delay_ms(120);		
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
			
		//-----------------------Write Enable (Manul 01)----------------------------		
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);
		buffer1[0] = 0x02;
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;		
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//---------------CMD3 enable------------------------------	
		SSD2828_W_Array(SigMode,channel,CMD3,0);
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_5D,0);  
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 		//1 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //2
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //3
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //4
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //5
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //6
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //7
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_75,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_77,0); 	  //8
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//-------------
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //1
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //2
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //3
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //4
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //5
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //6
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_75,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_77,0); 	  //7
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //8
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//------------		
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //1
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //2
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //3
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //4
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //5
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //6
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_75,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_77,0); 	  //7
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //8
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_5D,0); 	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		SSD2828_W_Array(SigMode,channel,FBh_00,0); 	
		SSD2828_W_Array(SigMode,channel,CMD3,0);
//-----------WRITE Status(Manual 02)QE=1-----------	
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x01; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,Index_07,0);
//		buffer1[0] = 0x03;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x00; 
//	  buffer1[3] = 0x42; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x02; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		delay_ms(120);
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x00; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//--------------Write Enable(Manul 01)[06h]---------
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x06; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//--------------Read status(Manual 03)[05h]----------
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x05; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x35; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,Index_12,0);
//	
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
//		delay_ms(5);				
//		Generate_MIPI_Read(pdev,SigMode,channel,0xC3 ,0x2, NT37701_639DOE_buf);  //C3=02,02
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(5);
//--------------Write Enable(Manul 01)[06h]---------
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x06; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//--------Read JEDEC ID[9Fh]-------------
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x9f; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_18,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x9f; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(120);
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_13,0);
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
		delay_ms(5);				
		Generate_MIPI_Read(pdev,SigMode,channel,0xC3 ,0x3, NT37701_639DOE_buf);  //C3=02,02
}

void NT37701_639DOE_Erase_Flash(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[5]; 
		u16 tmp;
		u8 error_times=0;
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 CMD3[6] ={0x05,0xFF,0xAA,0x55,0xA5,0x80};

		u8 Index_09[3]={0x02,0x6F,0x09};
		u8 Index_07[3]={0x02,0x6F,0x07};
		u8 Index_12[3]={0x02,0x6F,0x12};
		u8 Index_13[3]={0x02,0x6F,0x13};
		u8 Index_18[3]={0x02,0x6F,0x18};
		u8 Index_0A[3]={0x02,0x6F,0x0A};

		u8 C3h_01[9]={0x08,0xC3,0xC7,0x00,0x00,0x00,0x00,0x00,0x00};
		u8 C3h_02[9]={0x08,0xC3,0x03,0x00,0x00,0x08,0x00,0x0F,0xFA};
		//u8 C3h_03[9]={0x08,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF};

		u8 FBh_57[4]={0x03,0xFB,0x57,0x1F};
		u8 FBh_55[4]={0x03,0xFB,0x55,0x1F};
		u8 FBh_5D[4]={0x03,0xFB,0x5D,0x1F};
		u8 FBh_75[4]={0x03,0xFB,0x75,0x1F};
		u8 FBh_77[4]={0x03,0xFB,0x77,0x1F};
		u8 FBh_00[4]={0x03,0xFB,0x00,0x00};	
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);	
		
		//--------------------leave deep standby------------------------
//		SSD2828_W_Array(SigMode,channel,PAGE4,0);
//		buffer1[0] = 0x02;
//		buffer1[1] = 0xC3; 
//		buffer1[2] = 0xAB; 
//			SSD2828_W_Array(SigMode,channel,buffer1,0);
//		buffer1[0] = 0x02;		
//		buffer1[1] = 0x6F; 
//		buffer1[2] = 0x09; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		buffer1[0] = 0x02;		
//		buffer1[1] = 0xC3; 
//		buffer1[2] = 0x01; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
//		delay_ms(120);		
//		buffer1[0] = 0x02;
//		buffer1[1] = 0x6F; 
//		buffer1[2] = 0x09; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		buffer1[0] = 0x02;		
//		buffer1[1] = 0xC3; 
//		buffer1[2] = 0x00; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
////			
//		//-----------------------Write Enable (Manul 01)----------------------------		
//		buffer1[0] = 0x02;
//		buffer1[1] = 0xC3; 
//		buffer1[2] = 0x06; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		buffer1[0] = 0x02; 		
//		buffer1[1] = 0x6F; 
//		buffer1[2] = 0x09; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x01; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		delay_ms(120);
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0x6F; 
//	  buffer1[2] = 0x09; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);		
//		buffer1[0] = 0x02;		
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x00; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//////---------------CMD3 enable------------------------------	
//		SSD2828_W_Array(SigMode,channel,CMD3,0);
//		SSD2828_W_Array(SigMode,channel,Index_09,0); //0x6F,0x09
//		SSD2828_W_Array(SigMode,channel,FBh_5D,0); //0x5D,0x1F
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 		//1 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //2
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //3
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //4
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //5
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //6
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //7
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_75,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_77,0); 	  //8
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//////-------------
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //1
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //2
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //3
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //4
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //5
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //6
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_75,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_77,0); 	  //7
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //8
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
////------------		
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //1
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //2
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //3
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //4
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //5
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //6
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_75,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_77,0); 	  //7
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_55,0); 
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_57,0); 	  //8
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_5D,0); 	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		SSD2828_W_Array(SigMode,channel,FBh_00,0); 	
//		SSD2828_W_Array(SigMode,channel,CMD3,0);
//-----------WRITE Status(Manual 02)QE=1-----------	
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x01; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,Index_07,0);
//		buffer1[0] = 0x03;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x00; 
//	  buffer1[3] = 0x42; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x02; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		delay_ms(120);
//		SSD2828_W_Array(SigMode,channel,Index_09,0);
//		buffer1[0] = 0x02;
//	  buffer1[1] = 0xC3; 
//	  buffer1[2] = 0x00; 
//    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//-----------------Write Enable(Manul 01)--------------------	
		buffer1[0] = 0x02;	
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x06; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);				
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
//---------------chip erase(Manual 01)sector/Block erase(Manual 06)---------------------
		SSD2828_W_Array(SigMode,channel,C3h_01,0);
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(7000);		
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
//---------------Data Read(Manual 04)----------------------
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC2; 
	  buffer1[2] = 0x14; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x03;			
    buffer1[1] = 0xB1; 
	  buffer1[2] = 0x02; 
	  buffer1[3] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);			
		SSD2828_W_Array(SigMode,channel,C3h_02,0);
		delay_ms(200);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x08; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_0A,0);
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
		delay_ms(5);	

		do 
		{
			Generate_MIPI_Read(pdev,SigMode,channel,0xC3 ,0x3, NT37701_639DOE_buf);  //C3=FF,FF,FF 表示清空
			delay_ms(10);
			error_times++;
		}while((NT37701_639DOE_buf[0]!=0xff||NT37701_639DOE_buf[1]!=0xff||NT37701_639DOE_buf[2]!=0xff)&&(error_times<150)); 
		
//--------Read JEDEC ID[9Fh]-------------
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(5);	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x9f; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_18,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x9f; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(120);
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,Index_13,0);
//		
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
//		delay_ms(5);				
//		Generate_MIPI_Read(pdev,SigMode,channel,0xC3 ,0x3, NT37701_639DOE_buf);  //C3=02,02
}

void NT37701_639DOE_Program_Flash_Set(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 REG_C8[5] 	 = {0x04,0xC8,0xA5,0x5A,0x3C};	
		u8 REG_C3_1[5] = {0x04,0xC3,0x00,0x00,0x00};
		u8 REG_C3_2[5] = {0x04,0xC3,0x09,0xA4,0x40};
		u8 REG_C0_1[5] = {0x04,0xC0,0x76,0xF3,0x01};
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 PAGE0[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x00};
		u8 PAGE1[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x01};
		u8 buffer1[6];	
		u16 tmp;		

		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);			
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0xB1;
		buffer1[2] = 0x04;
		SSD2828_W_Array(SigMode,channel,buffer1,0); //SPD[3:0]=DIV8
		buffer1[0] = 0x02;
		buffer1[1] = 0xC2;
		buffer1[2] = 0x14;
		SSD2828_W_Array(SigMode,channel,buffer1,0); //SKIP_BYPASS_MODE=0
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x04;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		SSD2828_W_Array(SigMode,channel,REG_C3_1,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x01;
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,REG_C3_2,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0xB2;
		buffer1[2] = 0x70;
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		//-------------------Demura SRAM Enable--------------------------
		SSD2828_W_Array(SigMode,channel,PAGE0,0);	
		SSD2828_W_Array(SigMode,channel,REG_C0_1,0);			
		buffer1[0] = 0x02;
		buffer1[1] = 0x90;
		buffer1[2] = 0x00;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
		buffer1[1] = 0x66;
		buffer1[2] = 0x01;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		//-------------------Write Demura SRAM and set Flash program register--------------------------	
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x03;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC9;
		buffer1[2] = 0x02;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
//		buffer1[0] = 0x02;
//		buffer1[1] = 0x6F;
//		buffer1[2] = 0x04;
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		// RD_RAM_CHKSUM[15:0] C9=00,00,00
		SSD2828_W_Array(SigMode,channel,PAGE1,0);	
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC7;
		buffer1[2] = 0x01;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x01; 
		buffer1[1] = 0x11;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		//RD 0A=98H
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
//		delay_ms(5);				
//		Generate_MIPI_Read(pdev,SigMode,channel,0x0A ,0x1, NT37701_639DOE_buf);  
//		Debug_i=NT37701_639DOE_buf[0]; //0x98
		delay_ms(5);
}

void NT37701_639DOE_Program_Flash_Set2(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 REG_C8[5] 	 = {0x04,0xC8,0xA5,0x5A,0x3C};	
		u8 REG_C3_3[5] = {0x04,0xC3,0x09,0xA5,0x00};
		u8 REG_C3_4[5] = {0x04,0xC3,0x09,0xA4,0x40};
		u8 REG_C0_1[5] = {0x04,0xC0,0x76,0xF3,0x01};
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 PAGE0[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x00};
		u8 PAGE1[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x01};
		u8 buffer1[6];	
		u16 tmp;		
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);			
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0xB1;
		buffer1[2] = 0x04;
		SSD2828_W_Array(SigMode,channel,buffer1,0); //SPD[3:0]=DIV8
		buffer1[0] = 0x02;
		buffer1[1] = 0xC2;
		buffer1[2] = 0x14;
		SSD2828_W_Array(SigMode,channel,buffer1,0); //SKIP_BYPASS_MODE=0
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x04;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		SSD2828_W_Array(SigMode,channel,REG_C3_3,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x01;
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,REG_C3_4,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0xB2;
		buffer1[2] = 0x70;
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		//-------------------Demura SRAM Enable--------------------------
		SSD2828_W_Array(SigMode,channel,PAGE0,0);	
		SSD2828_W_Array(SigMode,channel,REG_C0_1,0);			
		buffer1[0] = 0x02;
		buffer1[1] = 0x90;
		buffer1[2] = 0x00;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
		buffer1[1] = 0x66;
		buffer1[2] = 0x01;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		//-------------------Write Demura SRAM and set Flash program register--------------------------	
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x03;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC9;
		buffer1[2] = 0x02;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
//		buffer1[0] = 0x02;
//		buffer1[1] = 0x6F;
//		buffer1[2] = 0x04;
//		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		// RD_RAM_CHKSUM[15:0] C9=00,00,00
		SSD2828_W_Array(SigMode,channel,PAGE1,0);	
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC7;
		buffer1[2] = 0x01;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x01; 
		buffer1[1] = 0x11;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(200);
		//RD 0A=98H
}

void NT37701_639DOE_Program_Flash_Set3(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	
}
void NT37701_639DOE_Program_Flash_Set4(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	
}

void NT37701_639DOE_Program_Flash_Load(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{	
		u8 REG_C8[5] 	 = {0x04,0xC8,0xA5,0x5A,0x3C};	
		u8 REG_C3_1[5] = {0x04,0xC3,0x00,0x00,0x00};
		u8 REG_C3_2[5] = {0x04,0xC3,0x09,0xA4,0x40};
		u8 REG_C0_1[5] = {0x04,0xC0,0x76,0xF3,0x01};
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 PAGE0[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x00};
		u8 PAGE1[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x01};

		u8 Index_01[3]={0x02,0x6F,0x01};
		u8 Index_03[3]={0x02,0x6F,0x03};
		u8 Index_04[3]={0x02,0x6F,0x04};
		u8 Index_09[3]={0x02,0x6F,0x09};
		u8 Index_08[3]={0x02,0x6F,0x08};
		u8 Index_07[3]={0x02,0x6F,0x07};
		u8 Index_12[3]={0x02,0x6F,0x12};
		
		u8 buffer1[6];	
		u16 tmp;		

		//READ AB=00,00H
		//delay_ms(500);
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);			
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
//		SSD2828_W_Array(SigMode,channel,Index_04,0);
		
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
//		delay_ms(5);				
//		Generate_MIPI_Read(pdev,SigMode,channel,0xC9 ,0x4, NT37701_639DOE_buf);  //C9=72,0A,AA,55
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
//		delay_ms(5);
	//---------leave deep standby[ABh]---------
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3;
		buffer1[2] = 0xAB;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);			
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		//------------------Write Enable(Manul 01)----------------------		
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);				
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Write Status(Manual 02)QE=1-------------------------	
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_07,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//----------Read status(Manul 03)[05h]------------
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x05; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x35; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
	//SSD2828_W_Array(SigMode,channel,Index_12,0);		
	//READ C2=02H	
		//------------------Write Enable(Manul 01) [06h]---
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,Index_09,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Start Flash Auto Program--------
		SSD2828_W_Array(SigMode,channel,REG_C8,0);
		delay_ms(5000);	
		//SSD2828_W_Array(SigMode,channel,Index_08,0);	
		//READ C9=00H
		
		//--------------QPP_RELOAD_Check--------------------
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		delay_ms(5);
		SSD2828_W_Array(SigMode,channel,Index_04,0);	
		SSD2828_W_Array(SigMode,channel,REG_C3_1,0);	
		delay_ms(5);
		SSD2828_W_Array(SigMode,channel,Index_01,0);		
		SSD2828_W_Array(SigMode,channel,REG_C3_2,0);
		delay_ms(5);
		SSD2828_W_Array(SigMode,channel,Index_03,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC9; 
		buffer1[2] = 0x03; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(500);		
		//SSD2828_W_Array(SigMode,channel,Index_04,0);	
//-----------------------------------------------------------------
		//SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
		//delay_ms(5);				
		//Generate_MIPI_Read(pdev,SigMode,channel,0xC9 ,0x5, NT37701_639DOE_buf);  //C9=32,44,32,44,04
		//----------------------------------------------------

}


void NT37701_639DOE_Program_Flash_Load2(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{	
		u8 REG_C8[5] 	 = {0x04,0xC8,0xA5,0x5A,0x3C};	
		u8 REG_C3_3[5] = {0x04,0xC3,0x09,0xA5,0x00};
		u8 REG_C3_4[5] = {0x04,0xC3,0x09,0xA4,0x40};
		u8 REG_C0_1[5] = {0x04,0xC0,0x76,0xF3,0x01};
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 PAGE0[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x00};
		u8 PAGE1[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x01};

		u8 Index_01[3]={0x02,0x6F,0x01};
		u8 Index_03[3]={0x02,0x6F,0x03};
		u8 Index_04[3]={0x02,0x6F,0x04};
		u8 Index_09[3]={0x02,0x6F,0x09};
		u8 Index_08[3]={0x02,0x6F,0x08};
		u8 Index_07[3]={0x02,0x6F,0x07};
		u8 Index_12[3]={0x02,0x6F,0x12};
		
		u8 buffer1[6];	
		u16 tmp;		

		//delay_ms(2000);
		//READ AB=00,00H
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);			
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
//		SSD2828_W_Array(SigMode,channel,Index_04,0);
		
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
//		delay_ms(5);				
//		Generate_MIPI_Read(pdev,SigMode,channel,0xC9 ,0x4, NT37701_639DOE_buf);  //C9=A6,7C,AA,55
//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
//		delay_ms(5);
	//---------leave deep standby[ABh]---------
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3;
		buffer1[2] = 0xAB;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);			
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		//------------------Write Enable(Manul 01)----------------------		
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);				
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Write Status(Manual 02)QE=1-------------------------	
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_07,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//----------Read status(Manul 03)[05h]------------
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x05; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x35; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
	//	SSD2828_W_Array(SigMode,channel,Index_12,0);		
	//READ C2=02H	
		//------------------Write Enable(Manul 01) [06h]---
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,Index_09,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		SSD2828_W_Array(SigMode,channel,Index_09,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Start Flash Auto Program--------
		SSD2828_W_Array(SigMode,channel,REG_C8,0);
		delay_ms(5000);	
		//SSD2828_W_Array(SigMode,channel,Index_08,0);	
		//READ C9=00H
		
		//--------------QPP_RELOAD_Check--------------------
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		delay_ms(5);
		SSD2828_W_Array(SigMode,channel,Index_04,0);	
		SSD2828_W_Array(SigMode,channel,REG_C3_3,0);	
		delay_ms(5);
		SSD2828_W_Array(SigMode,channel,Index_01,0);		
		SSD2828_W_Array(SigMode,channel,REG_C3_4,0);
		delay_ms(5);
		SSD2828_W_Array(SigMode,channel,Index_03,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC9; 
		buffer1[2] = 0x03; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(500);		
		//SSD2828_W_Array(SigMode,channel,Index_04,0);	
//-----------------------------------------------------------------
		//SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
		//delay_ms(5);				
		//Generate_MIPI_Read(pdev,SigMode,channel,0xC9 ,0x5, NT37701_639DOE_buf);  //C9=A6,7C,A6,7C,04
		//----------------------------------------------------
}

void NT37701_639DOE_Program_Flash_Load3(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{	
	
}

void NT37701_639DOE_Program_Flash_Load4(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{	

}


void NT37701_639DOE_Show(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 PAGE0[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x00};
		//u8 REG_CB[8] = {0x07,0xCB,0x84,0x10,0x20,0x40,0x80,0xA0};	
		u8 REG_CB[3] = {0x02,0xCB,0x84};	
		u8 REG_D0[6] = {0x05,0xD0,0x00,0x00,0x00,0x10};
		u8 buffer1[8]; 
		u16 tmp;

		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);	
		buffer1[0] = 0x01; 
		buffer1[1] = 0x10; 			
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		buffer1[0] = 0x01; 
		buffer1[1] = 0x28; 			
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		SSD2828_W_Array(SigMode,channel,PAGE0,0);
		
		buffer1[0] = 0x04; 
		buffer1[1] = 0xC0; 
		buffer1[2] = 0x76; 		
		buffer1[3] = 0xF3; 
		buffer1[4] = 0xC1; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,PAGE4,0);
		buffer1[0] = 0x02; 
	  buffer1[1] = 0xC2; 
	  buffer1[2] = 0x14; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0); //F_R_EN ON
		buffer1[0] = 0x02; 
	  buffer1[1] = 0xB1; 
	  buffer1[2] = 0x02; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
	  buffer1[1] = 0xB2; 
	  buffer1[2] = 0x40; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x01; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x04; 
		buffer1[1] = 0xB2; 
		buffer1[2] = 0x00; 		
		buffer1[3] = 0x00; 
		buffer1[4] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x04; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x04; 
		buffer1[1] = 0xB2; 
		buffer1[2] = 0x09; 		
		buffer1[3] = 0xA4; 
		buffer1[4] = 0x40; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x07; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x04; 
		buffer1[1] = 0xB2; 
		buffer1[2] = 0x09; 		
		buffer1[3] = 0xA5; 
		buffer1[4] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x0A; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x04; 
		buffer1[1] = 0xB2; 
		buffer1[2] = 0x09; 		
		buffer1[3] = 0xA4; 
		buffer1[4] = 0x40; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//Demura Setting
		SSD2828_W_Array(SigMode,channel,REG_CB,0);
		SSD2828_W_Array(SigMode,channel,REG_D0,0); //NVT1 Color 2x1
//--------------------------------------------------------		
		buffer1[0] = 0x01; 
	  buffer1[1] = 0x11; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);				
//	Load DISP SRAM Pattern	BMPLD	"D:\MY_Project\NT37701\IVE4S_NT37701\BMP\L64_bits.bmp"	
//		MIPIHL	1	
//		GRAMW		
//		MIPIHL	0			
		delay_ms(150);	
		buffer1[0] = 0x01; 
	  buffer1[1] = 0x29; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(120);				
		
//		buffer1[0] = 0x02; 
//	  buffer1[1] = 0x0A; 
//	  buffer1[2] = 0x9C; 		
//	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,PAGE4,0);
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x02; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
					 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC2;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);
		buffer[4]=tmp;
		buffer[5]=tmp>>8;
		delay_ms(5);
}


void NT37701_639DOE_Enable_Flash_Control_and_SPI_Flash_En(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u16 tmp=0;
	u8 buffer1[3];	

	NT37701_639DOE_QE1(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
	buffer[4]=NT37701_639DOE_buf[0];
	buffer[5]=NT37701_639DOE_buf[1];
	buffer[6]=NT37701_639DOE_buf[2];
	delay_ms(5);
	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //·μ?? ?áè?μ? Gammaêy?Y  ￡ook  
}


void NT37701_639DOE_Inter_Demura_Ram(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[3];	
	NT37701_639DOE_Program_Flash_Set(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
	delay_ms(5);
	buffer[0] = 0x2F;
	buffer[1] = 0x01;		

	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);        																					
}
                                    
void NT37701_639DOE_Inter_Demura_Ram2(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[3];
	NT37701_639DOE_Program_Flash_Set2(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
	delay_ms(5);
	buffer[0] = 0x2F;
	buffer[1] = 0x0B;		

	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);        																					
}

void NT37701_639DOE_Inter_Demura_Ram3(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    																					
}

void NT37701_639DOE_Inter_Demura_Ram4(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
   																					
}
                                    

void NT37701_639DOE_Exit_Demura_Ram(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
;
}
                               
void NT37701_639DOE_Flash_Write_Demura(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u32 error_times=0;
		u8 buffer1[3];
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);
		
		NT37701_639DOE_Program_Flash_Load(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
	
		Set_panel_reset(); //First FLOW End，PANEL RESET
		delay_ms(50);	
	
		buffer[0] = 0x2F;
		buffer[1] = 0x03;		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);		
}                       

void NT37701_639DOE_Flash_Write_Demura2(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u32 error_times=0;
		u8 buffer1[3];
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);
		
		NT37701_639DOE_Program_Flash_Load2(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
		Set_panel_reset(); //First FLOW End，PANEL RESET
		delay_ms(50);	
	
		buffer[0] = 0x2F;
		buffer[1] = 0x0A;		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);	
}
void NT37701_639DOE_Flash_Write_Demura3(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{

}
void NT37701_639DOE_Flash_Write_Demura4(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{

}



void NT37701_639DOE_Flash_Check_Demura(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u16 tmp=0;
	u8 buffer1[3];
	
	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15);

	
	delay_ms(5);
	buffer[0] = 0x2F;
	buffer[1] = 0x04;					
	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //·μ?? ?áè?μ? Gammaêy?Y  ￡ook  	
}
                                  
void NT37701_639DOE_Flash_Erase_Demura(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[3];
	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15);
	
	NT37701_639DOE_Erase_Flash(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);	
	buffer[0] = 0x2F;
	buffer[1] = 0x05;		
	buffer[4] = 0x00;		
	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //êy?Y3¤?è-crcá?×??ú	
}

void NT37701_639DOE_Flash_Demura_OTP(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
;
}

void NT37701_639DOE_Demura_Function_ON(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[7];	
	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15);	
	
	buffer1[0] = 0x06;
	buffer1[1] = 0xF0;
	buffer1[2] = 0x55;
	buffer1[3] = 0xAA;
	buffer1[4] = 0x52;
	buffer1[5] = 0x08;
	buffer1[6] = 0x04;
	SSD2828_W_Array(SigMode,channel,buffer1,0);
	delay_ms(5);	
	
	buffer1[0] = 0x02;
	buffer1[1] = 0xCB;
	buffer1[2] = 0x84;
	SSD2828_W_Array(SigMode,channel,buffer1,0);
	delay_ms(5);
	buffer[0] = 0x2F;
	buffer[1] = 0x07;		
	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //êy?Y3¤?è-crcá?×??ú
}

void NT37701_639DOE_Demura_Function_OFF(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[7];	
	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15);

	buffer1[0] = 0x06;
	buffer1[1] = 0xF0;
	buffer1[2] = 0x55;
	buffer1[3] = 0xAA;
	buffer1[4] = 0x52;
	buffer1[5] = 0x08;
	buffer1[6] = 0x04;
	SSD2828_W_Array(SigMode,channel,buffer1,0);
	delay_ms(5);		
	buffer1[0] = 0x02;
	buffer1[1] = 0xCB;
	buffer1[2] = 0x00;
	SSD2828_W_Array(SigMode,channel,buffer1,0);
	
	delay_ms(5);
	buffer[0] = 0x2F;  //Demura_type
	buffer[1] = 0x08;				
	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	STM2PC(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //·μ?? ?áè?μ? Gammaêy?Y  ￡ook  
}


void NT37701_GM820_Write_Demura_Ram(USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8 buffer[],u16 LP_B7_Data,u16 HS_B7_Data)
{
	USB_Rx_Demura_End_Flag=0;	
	if(USB_Rx_Demura==0)//第一笔数据
	{												
		Demura_first_package_flag=0;		
		DemuraTransOnce=180*3;
		//DemuraTransOnce=OLED.H_pixel*3;
		USB_Rx_Demura=1; //进入Demura数据写入状态														
	}
	for(i=0;i<USB_ReceivedCount;i++)
	{
		buffer[i+VCP_Receive_True_num] = USB_Rx_Buffer[i];  //
	}
	VCP_Receive_True_num+=USB_ReceivedCount;
	DemuraRecivedNum    +=USB_ReceivedCount;				
	//-----------------------------------------------------------------				
	
	if((VCP_Receive_True_num==DemuraTransOnce)||((DemuraRecivedNum==USB_Rx_Demura_Total_Num))) //写入单笔数据,单次写入DemuraTransOnce个字节
	{												
		if(Demura_first_package_flag==0)
		{
			Demura_first_package_flag=1;
			SSD2828_W_Reg(OLED.SigMode,channel,0xBC,(u16) (DemuraTransOnce)); 
			SSD2828_W_Reg(OLED.SigMode,channel,0xBD,(u16)((DemuraTransOnce)>>16)); 	
			//SSD2828_W_Reg(OLED.SigMode,CS_Master,0xBE,(u16) (180*3));
			SSD2828_W_Cmd(OLED.SigMode,channel,0xBF);
			SSD2828_W_Cmd(OLED.SigMode,channel,0x2C);	
			//SSD2828_W_Data(OLED.SigMode,channel,((buffer[0] << 8) + 0x4c));  //模拟4C 
		}
		else
		{
			SSD2828_W_Reg(OLED.SigMode,channel,0xBC,(u16) (VCP_Receive_True_num)); 
			SSD2828_W_Reg(OLED.SigMode,channel,0xBD,(u16)((VCP_Receive_True_num)>>16)); 	
			SSD2828_W_Cmd(OLED.SigMode,channel,0xBF);
			SSD2828_W_Cmd(OLED.SigMode,channel,0x3C);	
			//SSD2828_W_Data(OLED.SigMode,channel,((buffer[0] << 8) + 0x5c)); 
		}											
		SPI_CS_Select(channel,0);
		SSD2828_W_RAM_demura_buffer_part_bgr(OLED.pixel_clk,OLED.SigMode,buffer,DemuraTransOnce,1,0);
		SPI_CS_Select(channel,1);										
				
		VCP_Receive_True_num=0;
		
		if(DemuraRecivedNum==USB_Rx_Demura_Total_Num)//最后一笔，状态重置
		{
			Demura_START_FLAG=0;  //清除Demura状态
			DemuraRecivedNum=0; //累计接收统计归零
			USB_Rx_Demura=0;//进入Demura downloading标志
			Demura_first_package_flag=0; //Novatek_NT37701 4c/5c
			//SSD2828_W_Reg(OLED.SigMode,CS_Master,0xC0,0x0001);
		//	STM2PC(pdev,CDC_IN_EP,buf2PC,5+3);           //返回上位机5个byte数据
		}
	}
}


void ProcessForDmuR21( USBD_HandleTypeDef *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8 buffer[],u16 LP_B7_Data,u16 HS_B7_Data)
{	
	switch(USB_Rx_Buffer[1])
	{
			case 0x01:                                      //写寄存器
					NT37701_639DOE_Inter_Demura_Ram(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;	
			case 0x02:                                      //读寄存器
					NT37701_639DOE_Exit_Demura_Ram(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;						 
			case 0x03:                                      //读寄存器
					NT37701_639DOE_Flash_Write_Demura(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;	
			case 0x04:                                      //读寄存器
					NT37701_639DOE_Flash_Check_Demura(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;												
			case 0x05:                                      //读寄存器
					NT37701_639DOE_Flash_Erase_Demura(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			case 0x06:                                      //check flash ID
					NT37701_639DOE_Enable_Flash_Control_and_SPI_Flash_En(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;	
			case 0x07:                                      //check flash ID
					NT37701_639DOE_Demura_Function_ON(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;	
			case 0x08:                                      //check flash ID
					NT37701_639DOE_Demura_Function_OFF(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;													
			case 0x0A:
					NT37701_639DOE_Flash_Write_Demura2(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			case 0x0B:
					NT37701_639DOE_Inter_Demura_Ram2(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			case 0x0C:
					NT37701_639DOE_Flash_Write_Demura3(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			case 0x0D:
					NT37701_639DOE_Inter_Demura_Ram3(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			case 0x0E:
					NT37701_639DOE_Flash_Write_Demura4(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			case 0x0F:
					NT37701_639DOE_Inter_Demura_Ram4(pdev,CDC_IN_EP,OLED.SigMode ,channel,USB_Rx_Buffer,LP_B7_Data,HS_B7_Data);
			break;
			default:
				break;												
	}
}
//********************************************************************************************